industrial temperature range IDTQS74FCT2157AT/ct high-speed cmos quad 2-input multiplexer 1 january 2001 industrial temperature range the idt logo is a registered trademark of integrated device technology, inc. ? 2001 integrated device technology, inc. dsc-5401/3 features: ? cmos power levels: <7.5mw static ? undershoot clamp diodes on all inputs ? true ttl input and output compatibility ? ground bounce controlled outputs ? reduced output swing of 0 to 3.5v ? built-in 25 ? ? ? ? ? series resistor outputs reduce reflection and other system noise ? a and c speed grades with 4.3ns for c ?i ol = 12ma ? available in soic, qsop, and s1 packages functional block diagram IDTQS74FCT2157AT/ct high-speed cmos quad 2-input multiplexer description: the idtqs74fct2157t is a high-speed cmos ttl-compatible, quad, 2-input multiplexer with a 25 ? resistor output, useful for driving transmission lines and reducing system noise. all inputs have clamp diodes for undershoot noise suppression. all outputs have ground bounce suppression. outputs will not load an active bus when vcc is removed from the device. 25 ? ya 25 ? yb 25 ? yc 25 ? yd e s i0a i1a i0b i1b i0c i1c i0d i1d 15 1 23 5 6 11 10 14 13 47 9 12
industrial temperature range 2 IDTQS74FCT2157AT/ct high-speed cmos quad 2-input multiplexer pin configuration symbol description max unit v term terminal voltage with respect to gnd ?0.5 to +7 v t stg storage temperature ?65 to +150 c i out dc output current max current sink/pin +120 ma i ik input diode current, v in < 0 -20 ma i ok dc output current, v out < 0 -50 ma absolute maximum ratings (1) note: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. symbol parameter (1) conditions typ. max. unit c in input capacitance v in = 0v 4 ? pf c out output capacitance v out = 0v 8 ? pf capacitance (t a = +25c, f = 1.0mhz) note: 1. this parameter is measured at characterization but not tested. pin names description i x x data inputs e enable input (active low) s select input y x x outputs pin description soic/ qsop/ s1 top view 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 s i 0a gnd y b i 0b i 1b i 1a e i 0c i 1c y c i 0d i 1d y d v cc y a note: 1. h = high voltage level x = don?t care l = low voltage level function table (1) inputs e sy a y b y c y d function h x l l l l disable ll1 0a 1 0b 1 0c 1 0d select 0 lh1 1a 1 1b 1 1c 1 1d select 1
industrial temperature range IDTQS74FCT2157AT/ct high-speed cmos quad 2-input multiplexer 3 symbol parameter test conditions min. typ. (1) max. unit v ih input high level guaranteed logic high level 2 ? ? v v il input low level guaranteed logic low level ? ? 0.8 v ? v t input hysteresis v tlh - v thl for all inputs ? 0.2 ? v i ih input high current v cc = max. 0 v in v cc ?? 5a i il input low current i or current drive v cc = max., v out = gnd (2) 50 ? ? m a v ic input clamp voltage v cc = min., i in = ?18ma, t a = 25c (2) ? ?0.7 ?1.2 v v oh output high voltage v cc = min. i oh = ?15ma 2.4 ? ? v v ol output low voltage v cc = min. i ol = 12ma ? ? 0.5 v r out output resistance v cc = min. i oh = 12ma 20 28 40 ? dc electrical characteristics over operating range following conditions apply unless otherwise specified: industrial: t a = ?40c to +85c, v cc = 5.0v 5% notes: 1. typical values are at v cc = 5.0v, +25c ambient. 2. this parameter is guaranteed but not tested. symbol parameter test conditions (1) min. max. unit i cc quiescent power supply current v cc = max. ? 1.5 ma freq = 0 0v v in 0.2v or v cc - 0.2v v in v cc ? i cc supply current per input ttl inputs high v cc = max. ? 2 ma v in = 3.4v (2) freq = 0 i ccd supply current per input per mhz v cc = max. ? 0.25 ma/ outputs open and enabled mhz one bit toggling 50% duty cycle other inputs at gnd or v cc (3,4) notes: 1. for conditions shown as min. or max., use appropriate value specified under dc electrical characteristics. 2. per ttl driven input (v in = 3.4v). 3. for flip-flops, i ccd is measured by switching one of the data input pins so that the output changes every clock cycle. this is a measurement of de vice power consumption only and does not include power to drive load capacitance or tester capacitance. 4. i c = i quiescent + i inputs + i dynamic i c = i cc + ? i cc d h n t + i ccd (f cp /2 + f i n i ) i cc = quiescent current ? i cc = power supply current for a ttl high input (v in = 3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an output transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) f i = output frequency n i = number of outputs at f i all currents are in milliamps and all frequencies are in megahertz. power supply characteristics
industrial temperature range 4 IDTQS74FCT2157AT/ct high-speed cmos quad 2-input multiplexer note: 1. c load = 50pf, r load = 500 ? unless otherwise noted. 74fct2157at 74fct2157ct symbol parameter min. max. min. max. unit t plh propagation delay 1.5 5 1.5 4.3 ns t phl ixx to yx t plh propagation delay 1.5 7 1.5 5.2 ns t phl sx to yx t plh propagation delay 1.5 6 1.5 4.8 ns t phl e to yx switching characteristics over operating range (1)
industrial temperature range IDTQS74FCT2157AT/ct high-speed cmos quad 2-input multiplexer 5 pulse generator r t d.u.t. v cc v in c l v out 50pf 500 ? 500 ? 7.0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v data input timing input asynchronous control preset clear etc. synchronous control t su t h t rem t su t h high-low-high pulse low-high-low pulse t w 1.5v 1.5v same phase input transition 3v 1.5v 0v 1.5v v oh t plh output opposite phase input transition 3v 1.5v 0v t plh t phl t phl v ol control input 3v 1.5v 0v 3.5v 0v output normally low output normally high switch closed switch open v ol 0.3v 0.3v t plz t pzl t pzh t phz 3.5v 0v 1.5v 1.5v enable disable v oh preset clear clock enable etc. fctl link fctl link fctl link fctl link fctl link test circuits and waveforms propagation delay test circuits for all outputs enable and disable times set-up, hold, and release times pulse width notes: 1. diagram shown for input control enable-low and input control disable-high. 2. pulse generator for all pulses: rate 1.0mhz; t f 2.5ns; t r 2.5ns. test switch open drain disable low closed enable low all other tests open switch position definitions: c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator.
industrial temperature range 6 IDTQS74FCT2157AT/ct high-speed cmos quad 2-input multiplexer ordering information corporate headquarters for sales: for tech support: 2975 stender way 800-345-7015 or 408-727-6116 logichelp@idt.com santa clara, ca 95054 fax: 408-492-8674 (408) 654-6459 www.idt.com idtqs xx fct xxxx xx package device type so q s1 small outline ic (gull wing) quarter size small outline package small outline ic (gull wing) high-speed cmos quad 2-input multiplexer 2157at 2157ct temp. range 74 ?40c to +85c
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